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So it turns out that NVIDIA roadmap we saw last month was as true and pure as driven snow. The barely conceivable quad-core Tegra chip that it listed has now been made official by none other than NVIDIA itself, with the company also informing us that the new silicon is already sampling out to prospective clients. Known as Kal-El internally, this will most likely turn into NVIDIA's Tegra 3 as and when it's ready to enter the consumer market. Tonight NVIDIA whetted our appetite for what's to come with a demo that can most fittingly be described as an exhibition of unadulterated computational muscle. A 2560 x 1440 stream was being decoded on a developmental device, scaled down to that slate's native 1366 x 768 resolution, and additionally displayed on a connected 30-inch, 2560 x 1600 monitor. That entire voluminous workload was being handled in real time by Kal-El and we saw no signs of it struggling.

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Access to Hollywood content is also baked into the chip--a technology called Intel Insider. "This will unlock premium high-definition content, like movies, to your PC," Kilroy said. "We've gone out and engaged with the studios. So, you'll see Warner Bros. and Fox at launch [of Sandy Bridge] and several other studios to come. They're eagerly embracing this platform as a distribution means for premium high-end content--as Internet content [offered] directly to the end user."

Kilroy continued. "What Intel Insider does is deliver HD digital distribution rights to the PC. This could be enabled through multiple content storefronts through OEMs (PC makers), retailers like Best Buy. Essentially, the PC now becomes an on-ramp for HD 1080p movies," he said.

And Intel has added security features to protect the content. "And we've built in security capability into this platform that will enable end-to-end hardware protection for the content. So, it will protect the premium content rights of the studios," according to Kilroy.

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Bloomberg, which broke the news this afternoon, reported that sources familiar with Microsoft's plans said this version of Windows will continue to work on x86 processors, but that it should improve battery performance on devices like tablets and other devices that use ARM processors.

Additional confirmation of Microsoft's plans came from The Wall Street Journal, which added that this new version will not be available for another two years. CNET heard similar reports from a source who added that Microsoft plans to detail this version of Windows at an invite-only press event several hours ahead of its CES keynote.

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Despite putting more cores in the processor, we managed to keep it in the same power and thermal ranges as our existing "Shanghai" processors. And since it fits into the same socket, our OEM customers should be able to bring products to the market quickly. End users will be able to quickly qualify and deploy these servers because the overall platform is the same as what they are using. In today's challenging economic times, that's music to the ears of IT departments both near, and as far away as Turkey. So what did we show? We showed a platform being easily upgraded from Shanghai to Istanbul, some amazing memory throughput courtesy of the new HT Assist feature, and a 4-socket server with all 24 cores being stressed by one of our development programs.

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In another GDC session, Intel is also pushing the CPU for physics and AI: "How can your game have more accurate physics, smarter AI, more particles, and/or a faster frame-rate? By threading your game's engine to take advantage of multi-core processors. Intel has built a threaded game engine and demo called 'Smoke' that shows one way of achieving this goal," the abstract states.

It continues: "This presentation examines the Smoke architecture and how it is designed to take advantage of all CPU cores available within a system. It does this by executing different functional and data blocks in parallel to utilize all available cores."

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Low-power HE processors, with speeds ranging from 2.1GHz to 2.3GHz, are designed to address a segment of the server market "that must maximize performance during peak hours while managing the energy costs during idle and low-utilization hours," AMD said. High-performance SE processors, which run at 2.8GHz, are targeted at customers with "the most performance-intensive data center workloads," AMD said.

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Intel cuts were concentrated on quad-core chips like the Q9650 (3.00GHz), reduced 40 percent, to $316 from $530, to counter AMD's Phenom II. But Celeron processors received some of the largest reductions. The mobile Celeron 570 (2.00GHz), was slashed 48 percent, to $70 from $134, for example. Some Xeon processors also received hefty cuts. The price on the X3370 (3.00GHz), for instance, was cut 40 percent to $316 from $530.

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That didn't exactly send shivers down the spine of executives at Texas Instruments, Qualcomm, Samsung, STMicroelectronics and others that build chips for mobile phones. They've seen this coming for a long time, an inevitable consequence of Intel finding itself with reams of chipmaking capacity and a maturing PC market. And Intel has already tried this once, spending billions trying to develop a combination of chips for the cell phone market but failing miserably. Following Intel's show in San Francisco last week, ARM developers will be meeting next week in Santa Clara, Calif.--Intel's hometown--for its annual developers' conference to discuss new applications and techniques for extracting more performance out of ARM's processor cores. The collective effort of both camps should do wonders to jump-start a market for mobile devices built for real people, not just coffee-toting executives rushing through O'Hare trying to get the 7:42 flight to San Francisco.

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Barcelona represents AMD's current hope for returning to profitability by stabilizing its server processor prices. The company has been forced to dramatically cut the prices of its dual-core Opteron processors to compete with Intel's quad-core server processors, which have been on the market since last November. The hope is that Barcelona's design, in which four processing cores rest on the same piece of silicon, delivers enough of a performance boost over Intel's quad-core Xeon chip to once again attract demanding server buyers. Intel chose to put two dual-core chips into a single package for its first quad-core processors in order to get out in the market well ahead of AMD; AMD contends that's an inelegant design that doesn't solve Intel's problems with memory bandwidth.

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But AMD chose to build a single chip with four cores, which the company believes will result in better performance because information will not have to leave one core to visit its neighbor. It's the same debate over an integrated memory controller and point-to-point links that propelled AMD's Opteron and Athlon 64 chips to prominence: Cores that are directly linked offer better performance than cores that have to exchange information by leaving the chip. Intel contends that by improving the speed and performance of its cache memory and the front-side bus--that off-chip bridge between cores--it can offer excellent performance and sidestep manufacturing concerns. Because AMD has yet to deliver its quad-core chips, the debate is mostly aesthetic, but it could become an important distinction if Barcelona and the Phenom chips open a significant performance advantage over Intel's currently shipping quad-core processors later this year.

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Athlon 64 FX-74 (64-bit, 3.0GHz, 2MB total dedicated L2 cache, 2000MHz HyperTransport bus, Socket F (1207FX)) $799/pair
Athlon 64 FX-72 (64-bit, 2.8GHz, 2MB total dedicated L2 cache, 2000MHz HyperTransport bus, Socket F (1207FX)) $599/pair

Athlon 64 X2 6000+ (64-bit, 3.0GHz, 2MB total dedicated L2 cache, 2000MHz HyperTransport bus, socket AM2 ) $241
Athlon 64 X2 5600+ (64-bit, 2.8GHz, 2MB total dedicated L2 cache, 2000MHz HyperTransport bus, socket AM2) $188
Athlon 64 X2 5200+ (64-bit, 2.6GHz, 2MB total dedicated L2 cache, 2000MHz HyperTransport bus, socket AM2) $178

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"It was originally thought about as an eight-bit chip (Intel's and Advanced Micro Devices' current chips are 64-bits) designed to run spreadsheets," said Phil Hester, chief technology officer at AMD. Accordingly, the original design lacked support for, among other things, an appropriate number of general-purpose registers that would be needed for the modern computing era. Registers are essentially small holding stations for data as it awaits processing, and general-purpose registers are useful because they can store either data or an address where that data is stored. As the number of people using PCs made by IBM and so-called clone manufacturers grew, the x86 became the irreplaceable heart of the PC market. In the mid-1990s, Intel's entry into the server market with x86 chips cemented the ISA's dominance. Today, more than 90 percent of all servers shipped in the world use an x86 processor from either Intel or AMD.

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As reported earlier, the plant will be located in an industrial rust-belt hub in northeast China called Dalian in the Liaoning Province and will cost around $2.5 billion to build. The Chinese government is providing financial incentives to Intel, according to company spokesman Chuck Mulloy, and has built up the infrastructure around the city. Chips will start coming out of the factory in the first half of 2010. Initially, Intel will make chipsets--which shuttle data back and forth across the processor to the microprocessor of the computer--and possibly communications chips.

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The first chips produced by AMD on the new process will be desktop chips. Notebook and server chips will come in the relatively near future. Intel and AMD are in the midst of a manufacturing battle. Intel first began shipping 65-nanometer chips in October 2005. Chips made on the 65-nanometer process generally provide more performance and/or consume less power than those made on the older 90-nanometer process. (The nanometer figure refers to the average size of features on the chip; a nanometer is a billionth of a meter.)

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Carbon nanotubes, the reigning celebrity of the nanotechnology world, conduct electricity far better than metals. In fact, nanotubes exhibit what's called ballistic conductivity, which means that electrons are not scattered or impeded by obstacles. Nanotubes, which measure only a few billionths of a meter thick, are also far thinner than metal interconnects can be made. Potentially, this eliminates the problem with shrinking interconnects. IBM and others have made transistors out of carbon nanotubes. In its experiment, Intel aligned bundles of nanotubes by means of an electric field and then measured their frequency with fairly standard equipment.

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AMD's 90-nanometer dual-core Opteron and Athlon 64 processors have a die size of 199 millimeters squared. By chip design standards, that's considered a little large, McCarron said. When AMD starts making dual-core Opterons on its 65-nanometer manufacturing technology, that die size is expected to go down to something a little more comfortable that will allow AMD to produce more chips per wafer. An AMD representative declined to comment on the die size for its first 65-nanometer products. On a conference call following AMD's earnings results last week, Chief Financial Officer Bob Rivet noted that the company would see a cost benefit from its move to 65-nanometer processors in the fourth quarter, since the cost of building the wafer can be spread over more chips. He also pointed out that AMD still hasn't made the full transition to 300-millimeter-wide wafers from 200-millimeter wafers. Obviously, the larger the wafer, the more chips that can be cut from that wafer, and--not counting the one-time expense of purchasing 300-millimeter equipment--the extra costs of the larger wafer are negligible.

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Intel's work on silicon photonics, including its recent announcement of a silicon laser, could help contribute toward the core-to-core connection challenge. Rattner and Prof. John Bowers of the University of California at Santa Barbara demonstrated Intel's newest breakthrough model of silicon laser, which was constructed using conventional techniques that are better suited to volume manufacturing than older iterations of the laser. Many of the architectural nuances of the 80-core chip can be traced back to earlier research breakthroughs announced at previous IDFs. Connecting chips directly to each other through tiny wires is called Through Silicon Vias, which Intel discussed in 2005. TSV will give the chip an aggregate memory bandwidth of 1 terabyte per second.

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But attendees will definitely hear new information about Intel's quad-core chips. Enthusiast sites have been reporting that the processor will bear the "Core 2 Quadro" moniker, although Intel representatives have strongly denied that is the name for the upcoming chip. Whatever brand Intel chooses for Kentsfield, the desktop version, it will probably be associated with something expensive, as the initial buyers of Kentsfield should be early adopters willing to pay big bucks for the highest-performing chip on the market.

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It's being marketed as a device for "compute-intensive" operations, which confirms expectations that Cell would be introduced on the high end, and touted for its number-crunching ability. Each QS20 blade will feature a pair of Cells, each of which is what the STI coalition -- Sony, Toshiba, and IBM -- describes as a "multi-element" processor, rather than "multicore."

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IBM has announced that the first 'Broadway' CPUs created for the Nintendo Wii are being shipped from the company's East Fishkill, N.Y., fabrication facility to Nintendo, as the company ramps up for the launch of the next-gen console later this year. Under the terms of the agreement, IBM will produce millions of fully tested, Power Architecture-based chips featuring IBM Silicon on Insulator (SOI) technology at 90 nanometers (90 billionths of a meter), based on the specifications of the custom design agreement previously agreed upon by the two companies.

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Another significant change with Rev F Opteron is a faster version of the Double Data Rate memory technology called DDR2. With Woodcrest models of Xeon, Intel already moved to DDR2's sequel, FB-DIMM (fully buffered dual inline memory modules), which is based on DDR2 today but provides more capacity. AMD argues that FB-DIMM right now is merely more expensive and power-hungry, but the company will move to the technology later.

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Intel, fresh off the launch of its Core 2 Duo chips, has announced plans to accelerate the introduction of a quad-core processor called Kentsfield, now expected in the fourth quarter. Not to be outdone, AMD later this year will release a product called "4x4," which is two AMD processors connected together on a high-end motherboard. Both chipmakers' products will run hotter than the current processors, although it's unclear how much of a gap will exist. Intel hasn't released thermal specifications for Kentsfield yet, said Intel spokesman George Alfs. However, Kentsfield is essentially two Core 2 Duo processors bolted together onto a chip, so its thermal profile will certainly be higher than a single Core 2 Duo processor.

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But some analysts, such as NPD Techworld's Stephen Baker, fret that without a compelling reason to upgrade a PC this holiday season, holiday shoppers will spend their money on goodies like digital televisions and gaming consoles. In that sense, "the Core 2 Duo probably couldn't have come at a better time," Titera said. On top of the buzz that comes with a new chip, the performance delivered by the Core 2 Duo could also generate interest in high-end desktops that also deliver better margins for PC companies, he said.

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Five Intel Conroe parts will ship initially: the E6300, E6400, E6600, E6700, and X6800. All of these parts follow Intel's new processor numbering scheme, introduced when the Core Duo mobile processor family arrived earlier this year. The five dual-core Conroe processors are clocked at 1.86, 2.13, 2.40, 2.67GHz and 2.93GHz, respectively, run on a 1066MHz front side bus and contain either 2MB or 4MB of cache shared between the two cores.

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In the fourth quarter, AMD will start to ship chips based on the more advanced 65-nanometer process from its own factories, said Thomas Sonderman, director of Automated Precision Manufacturing (APM) Technology at AMD. Chartered will follow by putting out 65-nanometer Athlon family chips in mid-2007.

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The experiments, conducted jointly by IBM and Georgia Tech, are part of a project to explore the ultimate speed limits of silicon germanium (SiGe) devices, which are said to operate faster at cold temperatures. Ultrahigh-frequency SiGe circuits have potential applications in commercial communications systems, military electronics, space and remote sensing. The research could make possible a new class of powerful, low-energy chips that will deliver future applications like HDTV and movie-quality video to cellphones, automobiles and other devices.